How to guides

How to use the I2C slave library

How to use the I2C slave library

Required tools and libraries

The code in this application note is known to work on
version 14.1.1 of the xTIMEcomposer tools suite, it may work on other versions.

The application does not have any dependencies (i.e. it does not rely on any libraries).

Required hardware

Prerequisites

  • This document assumes familiarity with the XMOS xCORE architecture, the Universal Serial Bus 2.0 Specification (and related specifications, the XMOS tool chain and the xC language. Documentation related to these aspects which are not specific to this application note are linked to in the references appendix.
  • For descriptions of XMOS related terms found in this document please see the XMOS Glossary [#]_
    .

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Generating several controllable pulse signals

Generating several controllable pulse signals

This application note is a short how-to on programming/using the
xTIMEcomposer tools. It shows generating several controllable pulse signals.

Required tools and libraries

This application note is based on the following components:

  • xTIMEcomposer Tools – Version 14.0.0

Required hardware

Programming how-tos are generally not specific to any particular
hardware and can usually run on all XMOS devices. See the contents of
the note for full details.

Generating several controllable pulse signals Read More »

XA-SK-ETH100 Slice Card Hardware Guide

Pack Contents

  • One XA-SK-ETH100 Slice Card

Features

  • One SMSC LAN8710A-EZK 10/100 Ethernet Phy providing 10/100 Ethernet in conjunction with xSOFTip ethernet Mac components
  • SMI management interface
  • Magnetics, data LED as standard
  • Can be used in any Slicekit slot
  • Use multiple ETH100 slices to create systems with multiple ethernet ports

This table shows the port mapping for each of the Slice Card Signal IO, and the Slicekit Slot connector pin it is located on.

Function

STAR

TRIANGLE

SQUARE

CIRCLE

PIN

Description

RX_DV

1C

1K

1C

1K

B10

Phy RX Data Valid

RX_CLK

1B

1J

1B

1J

A8

Phy RX CLK (input to XMOS)

TX_CLK

1G

1I

1G

1I

B15

Phy TX CLK (output from XMOS)

TX_EN

1F

1L

1F

1L

A15

TX Data Enable

RXD0

4A0

4E0

4A0

4E0

B6

Phy RX Data

RXD1

4A1

4E1

4A1

4E1

B7

Phy RX Data

RXD2

4A2

4E2

4A2

4E2

A6

Phy RX Data

RXD3

4A3

4E3

4A3

4E3

A7

Phy RX Data

TXD0

4B0

4F0

4B0

4F0

B9

Phy TX Data

TXD1

4B1

4F1

4B1

4F1

B11

Phy TX Data

TXD2

4B2

4F2

4B2

4F2

A9

Phy TX Data

TXD3

4B3

4F3

4B3

4F3

A11

Phy TX Data

MDIO

8B0

8D0

8B0

8D0

B12

Phy SMI interface data

MDC

8B1

8D1

8B1

8D1

B13

Phy SMI interface clock

INT_N

8B2

8D2

8B2

8D2

B17

Phy SMI interface interrupt

RXERR

8B3

8D3

8B3

8D3

B18

RXERR not used in software

XA-SK-ETH100 Slice Card Hardware Guide Read More »

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