The term “general-purpose processor” has been widely used to describe CPUs that can run a broad range of software workloads. In the context of modern Arm-based SoCs, this label is still common, but as systems become more complex, it is worth asking how general-purpose these devices really are in practice.
While Arm-based SoCs offer flexibility at the software level, much of their real-world performance depends on fixed-function hardware blocks. Alongside the CPU sit DSPs, NPUs, GPUs, and other accelerators, each designed to handle specific workloads such as AI inference, audio processing, or imaging. This creates a system that is not defined by a single flexible compute resource, but by a collection of specialised components, each optimised for a narrow task.

The Trade-Off of Fixed Function
This approach delivers efficiency, but it introduces an important trade-off.
Fixed-function hardware can provide significant gains in power and performance for the workloads it was designed to handle, but it is inherently limited in its ability to adapt. Once defined in silicon, its capabilities are largely fixed. As workloads evolve or new algorithms emerge, these blocks may no longer provide the right fit, forcing developers to work around the hardware rather than allowing the hardware to adapt to the application.
In fast-moving areas such as edge and physical AI, this lack of flexibility becomes increasingly difficult to ignore.
The Illusion of Flexibility
Modern SoCs often appear flexible because of the strength of their software ecosystems. Operating systems, frameworks, and libraries provide layers of abstraction that simplify development and create a sense of portability.
In practice, however, achieving performance typically requires developers to target specific accelerators using vendor-specific tools and APIs. Workloads must be carefully mapped onto the available hardware, each with its own constraints and programming model, which means that flexibility is often limited by how well a problem fits the silicon.
As workloads change, these limitations become more visible. If a task does not map cleanly to an available accelerator, it falls back to the CPU, often resulting in higher latency, increased power consumption, and greater difficulty in meeting real-time requirements.
When Timing Matters
At the same time, many of these systems rely on shared resources and time-sliced execution, which can introduce variability in timing, particularly under load.
For applications that interact with the physical world, such as audio processing, motor control, or sensor feedback, this variability is not just a performance concern but a functional one. Meeting deadlines consistently becomes as important as raw compute capability, and systems must be designed to deliver predictable behaviour as well as flexibility.
Rethinking General Purpose
This combination of evolving workloads and real-time constraints highlights the need to rethink what “general-purpose” really means.
A truly general-purpose system is not defined by the number of accelerators it contains, but by its ability to adapt to changing requirements without being constrained by fixed-function hardware. This shifts the focus toward flexible, software-defined compute that can handle multiple tasks in parallel while maintaining predictable timing.
Silicon That Adapts
At XMOS, the XCORE® architecture and the XMOS GenSoC platform enable a different way to design systems.
GenSoC enables developers to generate their own SoC, from the I/O used to interface to the rest of the system, to the DSP, AI and control processing, in a single chip. Its architecture consists of parallel processing elements, meaning it can perform multiple tasks at the same time without interference, and complete them reliably, quickly and predictably, every time.
This changes how systems are designed. Instead of selecting silicon based on a fixed set of capabilities, developers can build systems that match their exact requirements, and continue to adapt those systems as those requirements evolve.
Beyond Fixed Function
As edge and physical AI systems continue to advance, workloads will become more complex, more integrated, and more time-sensitive. In this environment, general-purpose compute needs to be redefined, not as a collection of specialised blocks, but as a flexible foundation that can evolve alongside the applications it supports.
For silicon, this means moving beyond fixed-function design and toward architectures that are software-defined, deterministic, and inherently parallel.



