xCORE configurable multicore microcontrollers are available from four device families. All are based on the same fundamental architecture, making migration between device families easy. You can choose between a wide variety of core, memory, package and qualification variations, with pin-compatibility wherever possible giving you the option to flexibly add new features or cost-down existing designs.

  • xCORE General-Purpose: our XS1-L devices offer deterministic performance and interface flexibility for digital systems
  • xCORE-USB devices integrate a USB PHY.
  • xCORE-Analog devices are optimized for industrial applications and include Analog functions including multichannel 12bit ADCs.
  • xCORE-XA is a range of eXtended Architecture devices that combine xCORE technology with an ultra-low-power ARM Cortex-M3 processor.

Unlike traditional microcontrollers, xCORE devices can handle peripheral functions in software - so you can configure your xCORE device with the exact combination of peripherals and interfaces you require.

xCORE architecture

xCoRE tile capabilities

Every device is made up of one or more Tiles. There are several types of tile, but the commonest is the basic processor tile, which is the key to the deterministic processing, low latency and multicore capabilities of xCORE.

The xCORE processor tile is itself composed of a number of components:

  • xCORE logical processor cores: each tile contains 4, 5, 6 or 8 logical processor cores. The cores can execute computational code, 64-bit precision DSP, control tasks (such as logic decisions and executing a state machine) or software to handle I/O.
  • xTIME Scheduler: the scheduler performs the functions of a real-time operating system in hardware. It schedules tasks through the cores, and provides clock and timing functions, with resolution down to 10ns.
  • Hardware-Response ports: the key to ultra-low latency software-configurable I/O. The ports contain high-speed logic, which is controlled directly by the logical cores. The Ports include: clocking logic; comparison logic; time stamping; serialization and de-serialization.
  • xCONNECT: a fast crossbar switch that links the Tile resources together. xCONNECT can also be made available "off-tile", allowing tiles - and devices - to be efficiently interconnected.
  • SRAM: a unified memory architecture for both program and data, that is shared by all of the cores on the tile.
  • JTAG programming and debug interface:
  • OTP ROM: specifically designed to help secure your IP

xCORE eXtended Architecture

The xCORE-XA architecture includes an ultra-low power ARM® Cortex® M3 processor, effectively functioning as an extra core within the xCORE architecture. xCORE-XA allows embedded system designers to use high-level software to configure a device with the exact set of interfaces and peripherals needed for their design, while at the same time including existing ARM binary code or standard libraries, and taking advantage of ultra-low energy peripherals. Designers can also add real-time data-plane plus control processing and DSP blocks, using multiple xCORE processor cores, with the ARM available to run control plane software such as communication protocol stacks, standard graphics libraries, or complex monitoring systems.

xCORE-XA is specifically designed for use in battery-powered and other energy-sensitive applications. Its ultra-low-energy features include low-power modes with current consumption down to 100nA; fast wake-up; and fast processing, for more efficient overall energy usage.

xCORE-XA block diagram

Related Resources