rtos_clock_control_driver_core

Functions
void	rtos_clock_control_set_ref_clk_div (rtos_clock_control_t *ctx, unsigned divider)
unsigned	rtos_clock_control_get_ref_clk_div (rtos_clock_control_t *ctx)
void	rtos_clock_control_set_processor_clk_div (rtos_clock_control_t *ctx, unsigned divider)
unsigned	rtos_clock_control_get_processor_clk_div (rtos_clock_control_t *ctx)
void	rtos_clock_control_set_switch_clk_div (rtos_clock_control_t *ctx, unsigned divider)
unsigned	rtos_clock_control_get_switch_clk_div (rtos_clock_control_t *ctx)
unsigned	rtos_clock_control_get_ref_clock (rtos_clock_control_t *ctx)
unsigned	rtos_clock_control_get_processor_clock (rtos_clock_control_t *ctx)
unsigned	rtos_clock_control_get_switch_clock (rtos_clock_control_t *ctx)
void	rtos_clock_control_scale_links (rtos_clock_control_t *ctx, unsigned start_addr, unsigned end_addr, unsigned delay_intra, unsigned delay_inter)
void	rtos_clock_control_reset_links (rtos_clock_control_t *ctx, unsigned start_addr, unsigned end_addr)
void	rtos_clock_control_set_node_pll_ratio (rtos_clock_control_t *ctx, unsigned pre_div, unsigned mul, unsigned post_div)
void	rtos_clock_control_get_node_pll_ratio (rtos_clock_control_t *ctx, unsigned *pre_div, unsigned *mul, unsigned *post_div)
void	rtos_clock_control_get_local_lock (rtos_clock_control_t *ctx)
void	rtos_clock_control_release_local_lock (rtos_clock_control_t *ctx)

Detailed Description

The core functions for using an RTOS clock control driver instance after it has been initialized and started. These functions may be used by both the host and any client tiles that RPC has been enabled for.

Function Documentation

rtos_clock_control_get_local_lock()

void rtos_clock_control_get_local_lock ( rtos_clock_control_t *  ctx )

inline

Gets the local lock for clock control on the tile that owns this driver instance. This is intended for applications to use to prevent clock changes around critical sections.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_get_node_pll_ratio()

void rtos_clock_control_get_node_pll_ratio ( rtos_clock_control_t *  ctx, unsigned *  pre_div, unsigned *  mul, unsigned *  post_div  )

inline

Gets the divider stage 1, multiplier stage, and divider stage 2 values from the tile clock PLL control register values on the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.
pre_div	A pointer to be populated with the value of R
mul	A pointer to be populated with the value of F
post_div	A pointer to be populated with the value of OD

rtos_clock_control_get_processor_clk_div()

unsigned rtos_clock_control_get_processor_clk_div ( rtos_clock_control_t *  ctx )

inline

Gets the tile clock divider register value for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_get_processor_clock()

unsigned rtos_clock_control_get_processor_clock ( rtos_clock_control_t *  ctx )

inline

Gets the calculated core clock frequency for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_get_ref_clk_div()

unsigned rtos_clock_control_get_ref_clk_div ( rtos_clock_control_t *  ctx )

inline

Gets the reference clock divider register value for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_get_ref_clock()

unsigned rtos_clock_control_get_ref_clock ( rtos_clock_control_t *  ctx )

inline

Gets the calculated reference clock frequency for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_get_switch_clk_div()

unsigned rtos_clock_control_get_switch_clk_div ( rtos_clock_control_t *  ctx )

inline

Gets the switch clock divider register value for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_get_switch_clock()

unsigned rtos_clock_control_get_switch_clock ( rtos_clock_control_t *  ctx )

inline

Gets the calculated switch clock frequency for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_release_local_lock()

void rtos_clock_control_release_local_lock ( rtos_clock_control_t *  ctx )

inline

Releases the local lock for clock control on the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.

rtos_clock_control_reset_links()

void rtos_clock_control_reset_links ( rtos_clock_control_t *  ctx, unsigned  start_addr, unsigned  end_addr  )

inline

Resets the xlinks within an address range, inclusive for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.
start_addr	The starting link address
end_addr	The ending address

rtos_clock_control_scale_links()

void rtos_clock_control_scale_links ( rtos_clock_control_t *  ctx, unsigned  start_addr, unsigned  end_addr, unsigned  delay_intra, unsigned  delay_inter  )

inline

Sets the intra token delay and inter token delay to the xlinks within an address range, inclusive, for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.
start_addr	The starting link address
end_addr	The ending address
delay_intra	The intra token delay value
delay_inter	The inter token delay value

rtos_clock_control_set_node_pll_ratio()

void rtos_clock_control_set_node_pll_ratio ( rtos_clock_control_t *  ctx, unsigned  pre_div, unsigned  mul, unsigned  post_div  )

inline

Sets the tile clock PLL control register value on the tile that owns this driver instance. The value set is calculated from the divider stage 1, multiplier stage, and divider stage 2 values provided.

VCO freq = fosc * (F + 1) / (2 * (R + 1)) VCO must be between 260MHz and 1.3GHz for XS2 Core freq = VCO / (OD + 1)

Refer to the xcore Clock Frequency Control document for more details.

Note: This function will not reset the chip and wait for the PLL to settle before re-enabling the chip to allow for large frequency jumps. This will cause a delay during settings.

Note: It is up to the application to ensure that it is safe to change the clock.

Parameters

ctx	A pointer to the clock control driver instance to use.
pre_div	The value of R
mul	The value of F
post_div	The value of OD

rtos_clock_control_set_processor_clk_div()

void rtos_clock_control_set_processor_clk_div ( rtos_clock_control_t *  ctx, unsigned  divider  )

inline

Sets the tile clock divider register value for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.
divider	The value + 1 to write to XS1_PSWITCH_PLL_CLK_DIVIDER_NUM

rtos_clock_control_set_ref_clk_div()

void rtos_clock_control_set_ref_clk_div ( rtos_clock_control_t *  ctx, unsigned  divider  )

inline

Sets the reference clock divider register value for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.
divider	The value + 1 to write to XS1_SSWITCH_REF_CLK_DIVIDER_NUM

rtos_clock_control_set_switch_clk_div()

void rtos_clock_control_set_switch_clk_div ( rtos_clock_control_t *  ctx, unsigned  divider  )

inline

Sets the switch clock divider register value for the tile that owns this driver instance.

Parameters

ctx	A pointer to the clock control driver instance to use.
divider	The value + 1 to write to XS1_SSWITCH_CLK_DIVIDER_NUM