11 #define SFDP_READ_INSTRUCTION 0x5A
15 uint8_t minor_revision;
16 uint8_t major_revision;
23 uint8_t minor_revision;
24 uint8_t major_revision;
26 uint32_t table_address : 24;
31 sfdp_3_byte_address = 0,
32 sfdp_3_or_4_byte_address = 1,
33 sfdp_4_byte_address = 2,
36 #define SFDP_BUSY_POLL_LEGACY_BM 0x01
37 #define SFDP_BUSY_POLL_ALT1_BM 0x02
48 uint32_t address_bytes : 2;
51 uint32_t supports_144_fast_read: 1;
52 uint32_t supports_114_fast_read: 1;
56 uint32_t memory_density : 30;
57 uint32_t memory_density_is_exponent : 1;
60 uint8_t quad_144_read_dummy_clocks : 5;
61 uint8_t quad_144_read_mode_clocks : 3;
62 uint8_t quad_144_read_cmd;
63 uint8_t quad_114_read_dummy_clocks : 5;
64 uint8_t quad_114_read_mode_clocks : 3;
65 uint8_t quad_114_read_cmd;
88 uint32_t typ_to_max_prog_time_multiplier : 4;
89 uint32_t page_size : 4;
90 uint32_t page_prog_time_typ : 6;
91 uint32_t byte_prog_time_first_typ : 5;
92 uint32_t byte_prog_time_addl_typ : 5;
93 uint32_t chip_erase_time_typ : 7;
104 uint32_t busy_poll_methods : 6;
113 uint32_t xip_mode_supported : 1;
114 uint32_t xip_mode_exit_method : 6;
115 uint32_t xip_mode_entry_method : 4;
116 uint32_t quad_enable_method : 3;
117 uint32_t hold_reset_disable : 1;
121 uint32_t status_reg_1_info : 7;
123 uint32_t soft_reset_sequence : 6;
124 uint32_t four_byte_address_exit_method : 10;
125 uint32_t four_byte_address_enter_method : 8;
135 #define SFDP_READ_CALLBACK_ATTR __attribute__((fptrgroup("sfdp_read_cb_fptr_grp")))
137 typedef void (*sfdp_read_cb_t)(
void *flash_ctx,
void *data, uint32_t address,
size_t len);
139 size_t sfdp_flash_size_kbytes(
sfdp_info_t *sfdp_info);
140 size_t sfdp_flash_page_size_bytes(
sfdp_info_t *sfdp_info);
142 uint8_t *instruction,
144 uint8_t *ready_value);
145 int sfdp_quad_enable_method(
sfdp_info_t *sfdp_info,
148 uint8_t *sr2_read_instruction,
149 uint8_t *sr2_write_instruction);
152 void *serial_flash_ctx,
153 sfdp_read_cb_t sfdp_read);