XCORE SDK
XCORE Software Development Kit
xs3_vpu_info.h
1 // Copyright 2020-2021 XMOS LIMITED.
2 // This Software is subject to the terms of the XMOS Public Licence: Version 1.
3 
4 #pragma once
5 
6 
28 #define XS3_VPU_VREG_WIDTH_BITS (256)
29 
35 #define XS3_VPU_VREG_WIDTH_BYTES (XS3_VPU_VREG_WIDTH_BITS >> 3)
36 
42 #define XS3_VPU_VREG_WIDTH_WORDS (XS3_VPU_VREG_WIDTH_BYTES >> 2)
43 
49 enum {
56 };
57 
63 enum {
65  VEC_SH0 = 0,
67  VEC_SHL = 1,
69  VEC_SHR = 2,
70 };
71 
77 enum {
79  VPU_INT8_MAX = 0x7F,
81  VPU_INT8_MIN = -0x7F,
82 
84  VPU_INT16_MAX = 0x7FFF,
86  VPU_INT16_MIN = -0x7FFF,
87 
89  VPU_INT32_MAX = 0x7FFFFFFF,
91  VPU_INT32_MIN = -0x7FFFFFFF,
92 
94  VPU_INT40_MAX = 0x7FFFFFFFFFLL,
96  VPU_INT40_MIN = -0x7FFFFFFFFFLL,
97 };
98 
109 enum {
110  VPU_INT8_ACC_SIZE = 32,
111  VPU_INT16_ACC_SIZE = 32,
112  VPU_INT32_ACC_SIZE = 40,
113 };
114 
121 enum {
122  VPU_INT8_ACC_VR_BITS = 16,
123  VPU_INT16_ACC_VR_BITS = 16,
124  VPU_INT32_ACC_VR_BITS = 32,
125 };
132 enum {
133  VPU_INT8_ACC_VR_MASK = 0xFFFF,
134  VPU_INT16_ACC_VR_MASK = 0xFFFF,
135  VPU_INT32_ACC_VR_MASK = 0xFFFFFFFF,
136 };
137 
143 typedef int32_t vpu_int8_acc_t;
144 
150 typedef int32_t vpu_int16_acc_t;
151 
157 typedef int64_t vpu_int32_acc_t;
158 
168 enum {
169  VPU_INT8_EPV = 32,
170  VPU_INT16_EPV = 16,
171  VPU_INT32_EPV = 8,
172 };
173 
179 enum {
180  VPU_INT8_EPV_LOG2 = 5,
181  VPU_INT16_EPV_LOG2 = 4,
182  VPU_INT32_EPV_LOG2 = 3,
183 };
184 
193 enum {
194  VPU_INT8_ACC_PERIOD = 16,
195  VPU_INT16_ACC_PERIOD = 16,
196  VPU_INT32_ACC_PERIOD = 8,
197 };
198 
204 enum {
205  VPU_INT8_ACC_PERIOD_LOG2 = 4,
206  VPU_INT16_ACC_PERIOD_LOG2 = 4,
207  VPU_INT32_ACC_PERIOD_LOG2 = 3,
208 };
209 
217 enum {
218  VPU_INT8_VLMACC_ELMS = 16,
219  VPU_INT16_VLMACC_ELMS = 16,
220  VPU_INT32_VLMACC_ELMS = 8,
221 };
222 
228 enum {
229  VPU_INT8_VLMACC_ELMS_LOG2 = 4,
230  VPU_INT16_VLMACC_ELMS_LOG2 = 4,
231  VPU_INT32_VLMACC_ELMS_LOG2 = 3,
232 };
int32_t vpu_int8_acc_t
Definition: xs3_vpu_info.h:143
int32_t vpu_int16_acc_t
Definition: xs3_vpu_info.h:150
int64_t vpu_int32_acc_t
Definition: xs3_vpu_info.h:157
@ VSETCTRL_TYPE_INT8
Definition: xs3_vpu_info.h:55
@ VSETCTRL_TYPE_INT32
Definition: xs3_vpu_info.h:51
@ VSETCTRL_TYPE_INT16
Definition: xs3_vpu_info.h:53
@ VPU_INT32_MAX
Definition: xs3_vpu_info.h:89
@ VPU_INT40_MAX
Definition: xs3_vpu_info.h:94
@ VPU_INT40_MIN
Definition: xs3_vpu_info.h:96
@ VPU_INT32_MIN
Definition: xs3_vpu_info.h:91
@ VPU_INT8_MAX
Definition: xs3_vpu_info.h:79
@ VPU_INT16_MIN
Definition: xs3_vpu_info.h:86
@ VPU_INT8_MIN
Definition: xs3_vpu_info.h:81
@ VPU_INT16_MAX
Definition: xs3_vpu_info.h:84
@ VEC_SHL
Definition: xs3_vpu_info.h:67
@ VEC_SHR
Definition: xs3_vpu_info.h:69
@ VEC_SH0
Definition: xs3_vpu_info.h:65