XCORE SDK
XCORE Software Development Kit
i2c_reg.h
1 // Copyright 2021 XMOS LIMITED.
2 // This Software is subject to the terms of the XMOS Public Licence: Version 1.
3 #ifndef _i2c_c_reg_h_
4 #define _i2c_c_reg_h_
5 
6 #include <string.h>
7 #include "i2c.h"
8 
20 typedef enum {
25 
47 inline uint8_t read_reg(
48  i2c_master_t *ctx,
49  uint8_t device_addr,
50  uint8_t reg,
51  i2c_regop_res_t *result)
52 {
53  uint8_t buf[1] = {reg};
54  size_t bytes_sent = 0;
55  i2c_res_t res;
56 
57  res = i2c_master_write(ctx, device_addr, buf, 1, &bytes_sent, 0);
58  if (bytes_sent != 1) {
59  *result = I2C_REGOP_DEVICE_NACK;
61  return 0;
62  }
63  memset(buf, 0x00, 1);
64  res = i2c_master_read(ctx, device_addr, buf, 1, 1);
65  if (res == I2C_NACK) {
66  *result = I2C_REGOP_DEVICE_NACK;
67  } else {
68  *result = I2C_REGOP_SUCCESS;
69  }
70  return buf[0];
71 }
72 
94 inline uint8_t read_reg8_addr16(
95  i2c_master_t *ctx,
96  uint8_t device_addr,
97  uint16_t reg,
98  i2c_regop_res_t *result)
99 {
100  uint8_t buf[2] = {(uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF)};
101  size_t bytes_sent = 0;
102  i2c_res_t res;
103 
104  res = i2c_master_write(ctx, device_addr, buf, 2, &bytes_sent, 0);
105  if (bytes_sent != 2) {
106  *result = I2C_REGOP_DEVICE_NACK;
108  return 0;
109  }
110  memset(buf, 0x00, 2);
111  res = i2c_master_read(ctx, device_addr, buf, 1, 1);
112  if (res == I2C_NACK) {
113  *result = I2C_REGOP_DEVICE_NACK;
114  } else {
115  *result = I2C_REGOP_SUCCESS;
116  }
117  return buf[0];
118 }
119 
141 inline uint16_t read_reg16_addr8(
142  i2c_master_t *ctx,
143  uint8_t device_addr,
144  uint8_t reg,
145  i2c_regop_res_t *result)
146 {
147  uint8_t buf[2] = {reg, 0x00};
148  size_t bytes_sent = 0;
149  i2c_res_t res;
150 
151  res = i2c_master_write(ctx, device_addr, buf, 1, &bytes_sent, 0);
152  if (bytes_sent != 1) {
153  *result = I2C_REGOP_DEVICE_NACK;
155  return 0;
156  }
157  memset(buf, 0x00, 2);
158  res = i2c_master_read(ctx, device_addr, buf, 2, 1);
159  if (res == I2C_NACK) {
160  *result = I2C_REGOP_DEVICE_NACK;
161  } else {
162  *result = I2C_REGOP_SUCCESS;
163  }
164  return (uint16_t)((buf[0] << 8 )| buf[1]);
165 }
166 
188 inline uint16_t read_reg16(
189  i2c_master_t *ctx,
190  uint8_t device_addr,
191  uint16_t reg,
192  i2c_regop_res_t *result)
193 {
194  uint8_t buf[2] = {(uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF)};
195  size_t bytes_sent = 0;
196  i2c_res_t res;
197 
198  res = i2c_master_write(ctx, device_addr, buf, 2, &bytes_sent, 0);
199  if (bytes_sent != 2) {
200  *result = I2C_REGOP_DEVICE_NACK;
202  return 0;
203  }
204  memset(buf, 0x00, 2);
205  res = i2c_master_read(ctx, device_addr, buf, 2, 1);
206  if (res == I2C_NACK) {
207  *result = I2C_REGOP_DEVICE_NACK;
208  } else {
209  *result = I2C_REGOP_SUCCESS;
210  }
211  return (uint16_t)((buf[0] << 8 )| buf[1]);
212 }
213 
232  i2c_master_t *ctx,
233  uint8_t device_addr,
234  uint8_t reg,
235  uint8_t data)
236 {
237  uint8_t buf[2] = {reg, data};
238  size_t bytes_sent = 0;
239  i2c_regop_res_t reg_res;
240 
241  i2c_master_write(ctx, device_addr, buf, 2, &bytes_sent, 1);
242  if (bytes_sent == 0) {
243  reg_res = I2C_REGOP_DEVICE_NACK;
244  } else if (bytes_sent < 2) {
245  reg_res = I2C_REGOP_INCOMPLETE;
246  } else {
247  reg_res = I2C_REGOP_SUCCESS;
248  }
249  return reg_res;
250 }
251 
270  i2c_master_t *ctx,
271  uint8_t device_addr,
272  uint16_t reg,
273  uint8_t data)
274 {
275  uint8_t buf[3] = {(uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF), (uint8_t)(data)};
276  size_t bytes_sent = 0;
277  i2c_regop_res_t reg_res;
278 
279  i2c_master_write(ctx, device_addr, buf, 3, &bytes_sent, 1);
280  if (bytes_sent == 0) {
281  reg_res = I2C_REGOP_DEVICE_NACK;
282  } else if (bytes_sent < 3) {
283  reg_res = I2C_REGOP_INCOMPLETE;
284  } else {
285  reg_res = I2C_REGOP_SUCCESS;
286  }
287  return reg_res;
288 }
289 
308  i2c_master_t *ctx,
309  uint8_t device_addr,
310  uint8_t reg,
311  uint16_t data)
312 {
313  uint8_t buf[3] = {(uint8_t)(reg), (uint8_t)((data >> 8) & 0xFF), (uint8_t)(data & 0xFF)};
314  size_t bytes_sent = 0;
315  i2c_regop_res_t reg_res;
316 
317  i2c_master_write(ctx, device_addr, buf, 3, &bytes_sent, 1);
318  if (bytes_sent == 0) {
319  reg_res = I2C_REGOP_DEVICE_NACK;
320  } else if (bytes_sent < 3) {
321  reg_res = I2C_REGOP_INCOMPLETE;
322  } else {
323  reg_res = I2C_REGOP_SUCCESS;
324  }
325  return reg_res;
326 }
327 
346  i2c_master_t *ctx,
347  uint8_t device_addr,
348  uint16_t reg,
349  uint16_t data)
350 {
351  uint8_t buf[4] = {(uint8_t)((reg >> 8) & 0xFF), (uint8_t)(reg & 0xFF),
352  (uint8_t)((data >> 8) & 0xFF), (uint8_t)(data & 0xFF)};
353  size_t bytes_sent = 0;
354  i2c_regop_res_t reg_res;
355 
356  i2c_master_write(ctx, device_addr, buf, 4, &bytes_sent, 1);
357  if (bytes_sent == 0) {
358  reg_res = I2C_REGOP_DEVICE_NACK;
359  } else if (bytes_sent < 4) {
360  reg_res = I2C_REGOP_INCOMPLETE;
361  } else {
362  reg_res = I2C_REGOP_SUCCESS;
363  }
364  return reg_res;
365 }
366  // END: addtogroup hil_i2c_register
368 
369 #endif
i2c_res_t
Definition: i2c.h:21
i2c_res_t i2c_master_write(i2c_master_t *ctx, uint8_t device_addr, uint8_t buf[], size_t n, size_t *num_bytes_sent, int send_stop_bit)
void i2c_master_stop_bit_send(i2c_master_t *ctx)
i2c_res_t i2c_master_read(i2c_master_t *ctx, uint8_t device_addr, uint8_t buf[], size_t n, int send_stop_bit)
@ I2C_NACK
Definition: i2c.h:22
uint8_t read_reg(i2c_master_t *ctx, uint8_t device_addr, uint8_t reg, i2c_regop_res_t *result)
Definition: i2c_reg.h:47
i2c_regop_res_t write_reg(i2c_master_t *ctx, uint8_t device_addr, uint8_t reg, uint8_t data)
Definition: i2c_reg.h:231
i2c_regop_res_t write_reg8_addr16(i2c_master_t *ctx, uint8_t device_addr, uint16_t reg, uint8_t data)
Definition: i2c_reg.h:269
i2c_regop_res_t write_reg16_addr8(i2c_master_t *ctx, uint8_t device_addr, uint8_t reg, uint16_t data)
Definition: i2c_reg.h:307
i2c_regop_res_t write_reg16(i2c_master_t *ctx, uint8_t device_addr, uint16_t reg, uint16_t data)
Definition: i2c_reg.h:345
uint16_t read_reg16(i2c_master_t *ctx, uint8_t device_addr, uint16_t reg, i2c_regop_res_t *result)
Definition: i2c_reg.h:188
uint8_t read_reg8_addr16(i2c_master_t *ctx, uint8_t device_addr, uint16_t reg, i2c_regop_res_t *result)
Definition: i2c_reg.h:94
i2c_regop_res_t
Definition: i2c_reg.h:20
uint16_t read_reg16_addr8(i2c_master_t *ctx, uint8_t device_addr, uint8_t reg, i2c_regop_res_t *result)
Definition: i2c_reg.h:141
@ I2C_REGOP_INCOMPLETE
Definition: i2c_reg.h:23
@ I2C_REGOP_DEVICE_NACK
Definition: i2c_reg.h:22
@ I2C_REGOP_SUCCESS
Definition: i2c_reg.h:21
Definition: i2c.h:38