sl_wfx_registers.h stdint.h /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/bus/sl_wfx_bus_sdio.c /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/bus/sl_wfx_bus_spi.c /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/sl_wfx.h stdint.h /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/firmware/sl_wfx_registers.h /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/firmware/sl_wfx_registers.h /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/sl_wfx.h /build/modules/rtos/modules/drivers/wifi/sl_wf200/thirdparty/wfx-fullMAC-driver/wfx_fmac_driver/secure_link/sl_wfx_secure_link.h /build/modules/rtos/modules/drivers/wifi/sl_wf200/FreeRTOS/sl_wfx_iot_wifi.h SYS_BASE_ADDR_SILICON (0) Copyright 2018, Silicon Laboratories Inc. Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License. PAC_BASE_ADDRESS_SILICON (SYS_BASE_ADDR_SILICON + 0x09000000) PAC_SHARED_MEMORY_SILICON (PAC_BASE_ADDRESS_SILICON) SL_WFX_APB addr (PAC_SHARED_MEMORY_SILICON + (addr)) DOWNLOAD_BOOT_LOADER_OFFSET (0x00000000) DOWNLOAD_FIFO_SIZE (0x00008000) DOWNLOAD_CTRL_DATA_DWORDS (32 - 6) DOWNLOAD_CTRL_OFFSET (0x0900C000) DOWNLOAD_IMAGE_SIZE_REG (DOWNLOAD_CTRL_OFFSET + 0) DOWNLOAD_PUT_REG (DOWNLOAD_CTRL_OFFSET + offsetof(struct download_cntl_t, put)) DOWNLOAD_TRACE_PC_REG (DOWNLOAD_CTRL_OFFSET + offsetof(struct download_cntl_t, trace_pc)) DOWNLOAD_GET_REG (DOWNLOAD_CTRL_OFFSET + offsetof(struct download_cntl_t, get)) DOWNLOAD_STATUS_REG (DOWNLOAD_CTRL_OFFSET + offsetof(struct download_cntl_t, status)) DOWNLOAD_DEBUG_DATA_REG (DOWNLOAD_CTRL_OFFSET + offsetof(struct download_cntl_t, debug_data)) DOWNLOAD_DEBUG_DATA_LEN (108) DOWNLOAD_BLOCK_SIZE (1024) ADDR_DWL_CTRL_AREA 0x0900C000 FW_KEYSET_SIZE 8 FW_SIGNATURE_SIZE 64 FW_HASH_SIZE 8 ADDR_DWL_CTRL_AREA_IMAGE_SIZE (ADDR_DWL_CTRL_AREA + 0) ADDR_DWL_CTRL_AREA_PUT (ADDR_DWL_CTRL_AREA + 4) ADDR_DWL_CTRL_AREA_GET (ADDR_DWL_CTRL_AREA + 8) ADDR_DWL_CTRL_AREA_HOST_STATUS (ADDR_DWL_CTRL_AREA + 12) ADDR_DWL_CTRL_AREA_NCP_STATUS (ADDR_DWL_CTRL_AREA + 16) ADDR_DWL_CTRL_AREA_SIGNATURE (ADDR_DWL_CTRL_AREA + 20) ADDR_DWL_CTRL_AREA_FW_HASH (ADDR_DWL_CTRL_AREA_SIGNATURE + FW_SIGNATURE_SIZE) ADDR_DWL_CTRL_AREA_FW_VERSION (ADDR_DWL_CTRL_AREA_FW_HASH + FW_HASH_SIZE) HOST_STATE_UNDEF 0xFFFFFFFF HOST_STATE_NOT_READY 0x12345678 HOST_STATE_READY 0x87654321 HOST_STATE_HOST_INFO_READ 0xA753BD99 HOST_STATE_UPLOAD_PENDING 0xABCDDCBA HOST_STATE_UPLOAD_COMPLETE 0xD4C64A99 HOST_STATE_OK_TO_JUMP 0x174FC882 NCP_STATE_UNDEF 0xFFFFFFFF NCP_STATE_NOT_READY 0x12345678 NCP_STATE_INFO_READY 0xBD53EF99 NCP_STATE_READY 0x87654321 NCP_STATE_DOWNLOAD_PENDING 0xABCDDCBA NCP_STATE_DOWNLOAD_COMPLETE 0xCAFEFECA NCP_STATE_AUTH_OK 0xD4C64A99 NCP_STATE_AUTH_FAIL 0x174FC882 NCP_STATE_PUB_KEY_RDY 0x7AB41D19 ADDR_DOWNLOAD_FIFO_BASE 0x09004000 ADDR_DOWNLOAD_FIFO_END 0x0900C000 ADDR_SHARED_RAM_DEBUG_AREA 0x09002000 BIT n (1 << (n)) SL_WFX_CONT_REGISTER_SIZE (0x02) SL_WFX_CONT_NEXT_LEN_MASK (0x0FFF) SL_WFX_CONT_WUP_BIT (BIT(12)) SL_WFX_CONT_RDY_BIT (BIT(13)) SL_WFX_CONT_FRAME_TYPE_INFO (BIT(14) | BIT(15)) SL_WFX_CONT_FRAME_TYPE_OFFSET (0x0E) SL_WFX_CONFIG_ERROR_CSN_FRAME (BIT(0)) SL_WFX_CONFIG_ERROR_READ_UNDERRUN (BIT(1)) SL_WFX_CONFIG_ERROR_READ_LESS (BIT(2)) SL_WFX_CONFIG_FRAME_READ_ENTRY (BIT(3)) SL_WFX_CONFIG_ERROR_SEND_OVERRUN (BIT(4)) SL_WFX_CONFIG_ERROR_SEND_LARGE (BIT(5)) SL_WFX_CONFIG_ERROR_SEND_ENTRY (BIT(6)) SL_WFX_CONFIG_CSN_FRAME_BIT (BIT(7)) SL_WFX_CONFIG_ERROR_MASK (0x000F) SL_WFX_CONFIG_WORD_MODE_BITS (BIT(8) | BIT(9)) SL_WFX_CONFIG_WORD_MODE_1 (BIT(8)) SL_WFX_CONFIG_WORD_MODE_2 (BIT(9)) SL_WFX_CONFIG_ACCESS_MODE_BIT (BIT(10)) SL_WFX_CONFIG_AHB_PRFETCH_BIT (BIT(11)) SL_WFX_CONFIG_CPU_CLK_DIS_BIT (BIT(12)) SL_WFX_CONFIG_PRFETCH_BIT (BIT(13)) SL_WFX_CONFIG_CPU_RESET_BIT (BIT(14)) SL_WFX_CONFIG_CLEAR_INT_BIT (BIT(15)) SL_WFX_CONFIG_DATA_IRQ_ENABLE (BIT(16)) SL_WFX_CONFIG_WUP_IRQ_ENABLE (BIT(17)) SL_WFX_CONFIG_DATA_WUP_ENABLE (BIT(16) | BIT(17)) SL_WFX_CONFIG_REVISION_OFFSET (0x18) SL_WFX_CONFIG_REVISION_MASK (0x7) SL_WFX_CONFIG_TYPE_OFFSET (0x1F) SL_WFX_CONFIG_TYPE_MASK (0x1) SL_WFX_SDIO_CCCR_IO_QUEUE_ENABLE (0x02) SL_WFX_SDIO_CCCR_IRQ_ENABLE (0x04) SL_WFX_SDIO_CCCR_BUS_INTERFACE_CONTROL (0x07) SL_WFX_SDIO_CCCR_HIGH_SPEED_ENABLE (0x13) SL_WFX_SDIO_FBR1_BLOCK_SIZE_LSB (0x110) /* Function 1 16-bit block size LSB */ SL_WFX_SDIO_FBR1_BLOCK_SIZE_MSB (0x111) /* Function 1 16-bit block size MSB */ FW_VERSION_VALUE 0x00000001 /**************************************************************************/ #ifndefSL_WFX_REGISTERS_H #defineSL_WFX_REGISTERS_H #include<stdint.h> #defineSYS_BASE_ADDR_SILICON(0) #definePAC_BASE_ADDRESS_SILICON(SYS_BASE_ADDR_SILICON+0x09000000) #definePAC_SHARED_MEMORY_SILICON(PAC_BASE_ADDRESS_SILICON) #defineSL_WFX_APB(addr)(PAC_SHARED_MEMORY_SILICON+(addr)) /*Downloadcontrolarea*/ #defineDOWNLOAD_BOOT_LOADER_OFFSET(0x00000000) #defineDOWNLOAD_FIFO_SIZE(0x00008000) #defineDOWNLOAD_CTRL_DATA_DWORDS(32-6) #defineDOWNLOAD_CTRL_OFFSET(0x0900C000) #defineDOWNLOAD_IMAGE_SIZE_REG(DOWNLOAD_CTRL_OFFSET+0) #defineDOWNLOAD_PUT_REG(DOWNLOAD_CTRL_OFFSET+offsetof(structdownload_cntl_t,put)) #defineDOWNLOAD_TRACE_PC_REG(DOWNLOAD_CTRL_OFFSET+offsetof(structdownload_cntl_t,trace_pc)) #defineDOWNLOAD_GET_REG(DOWNLOAD_CTRL_OFFSET+offsetof(structdownload_cntl_t,get)) #defineDOWNLOAD_STATUS_REG(DOWNLOAD_CTRL_OFFSET+offsetof(structdownload_cntl_t,status)) #defineDOWNLOAD_DEBUG_DATA_REG(DOWNLOAD_CTRL_OFFSET+offsetof(structdownload_cntl_t,debug_data)) #defineDOWNLOAD_DEBUG_DATA_LEN(108) #defineDOWNLOAD_BLOCK_SIZE(1024) #defineADDR_DWL_CTRL_AREA0x0900C000 #defineFW_KEYSET_SIZE8 #defineFW_SIGNATURE_SIZE64 #defineFW_HASH_SIZE8 #defineADDR_DWL_CTRL_AREA_IMAGE_SIZE(ADDR_DWL_CTRL_AREA+0) #defineADDR_DWL_CTRL_AREA_PUT(ADDR_DWL_CTRL_AREA+4) #defineADDR_DWL_CTRL_AREA_GET(ADDR_DWL_CTRL_AREA+8) #defineADDR_DWL_CTRL_AREA_HOST_STATUS(ADDR_DWL_CTRL_AREA+12) #defineADDR_DWL_CTRL_AREA_NCP_STATUS(ADDR_DWL_CTRL_AREA+16) #defineADDR_DWL_CTRL_AREA_SIGNATURE(ADDR_DWL_CTRL_AREA+20) #defineADDR_DWL_CTRL_AREA_FW_HASH(ADDR_DWL_CTRL_AREA_SIGNATURE+FW_SIGNATURE_SIZE) #defineADDR_DWL_CTRL_AREA_FW_VERSION(ADDR_DWL_CTRL_AREA_FW_HASH+FW_HASH_SIZE) #defineHOST_STATE_UNDEF0xFFFFFFFF #defineHOST_STATE_NOT_READY0x12345678 #defineHOST_STATE_READY0x87654321 #defineHOST_STATE_HOST_INFO_READ0xA753BD99 #defineHOST_STATE_UPLOAD_PENDING0xABCDDCBA #defineHOST_STATE_UPLOAD_COMPLETE0xD4C64A99 #defineHOST_STATE_OK_TO_JUMP0x174FC882 #defineNCP_STATE_UNDEF0xFFFFFFFF #defineNCP_STATE_NOT_READY0x12345678 #defineNCP_STATE_INFO_READY0xBD53EF99 #defineNCP_STATE_READY0x87654321 #defineNCP_STATE_DOWNLOAD_PENDING0xABCDDCBA #defineNCP_STATE_DOWNLOAD_COMPLETE0xCAFEFECA #defineNCP_STATE_AUTH_OK0xD4C64A99 #defineNCP_STATE_AUTH_FAIL0x174FC882 #defineNCP_STATE_PUB_KEY_RDY0x7AB41D19 #defineADDR_DOWNLOAD_FIFO_BASE0x09004000 #defineADDR_DOWNLOAD_FIFO_END0x0900C000 #defineADDR_SHARED_RAM_DEBUG_AREA0x09002000 #defineBIT(n)(1<<(n)) /*Controlregisterbitset*/ #defineSL_WFX_CONT_REGISTER_SIZE(0x02) #defineSL_WFX_CONT_NEXT_LEN_MASK(0x0FFF) #defineSL_WFX_CONT_WUP_BIT(BIT(12)) #defineSL_WFX_CONT_RDY_BIT(BIT(13)) #defineSL_WFX_CONT_FRAME_TYPE_INFO(BIT(14)|BIT(15)) #defineSL_WFX_CONT_FRAME_TYPE_OFFSET(0x0E) /*Configregisterbitset*/ #defineSL_WFX_CONFIG_ERROR_CSN_FRAME(BIT(0)) #defineSL_WFX_CONFIG_ERROR_READ_UNDERRUN(BIT(1)) #defineSL_WFX_CONFIG_ERROR_READ_LESS(BIT(2)) #defineSL_WFX_CONFIG_FRAME_READ_ENTRY(BIT(3)) #defineSL_WFX_CONFIG_ERROR_SEND_OVERRUN(BIT(4)) #defineSL_WFX_CONFIG_ERROR_SEND_LARGE(BIT(5)) #defineSL_WFX_CONFIG_ERROR_SEND_ENTRY(BIT(6)) #defineSL_WFX_CONFIG_CSN_FRAME_BIT(BIT(7)) #defineSL_WFX_CONFIG_ERROR_MASK(0x000F) /*Wordmodeconfig*/ #defineSL_WFX_CONFIG_WORD_MODE_BITS(BIT(8)|BIT(9)) #defineSL_WFX_CONFIG_WORD_MODE_1(BIT(8)) #defineSL_WFX_CONFIG_WORD_MODE_2(BIT(9)) /*QueueM*/ #defineSL_WFX_CONFIG_ACCESS_MODE_BIT(BIT(10)) /*AHBbus*/ #defineSL_WFX_CONFIG_AHB_PRFETCH_BIT(BIT(11)) #defineSL_WFX_CONFIG_CPU_CLK_DIS_BIT(BIT(12)) /*APBbus*/ #defineSL_WFX_CONFIG_PRFETCH_BIT(BIT(13)) /*CPUreset*/ #defineSL_WFX_CONFIG_CPU_RESET_BIT(BIT(14)) #defineSL_WFX_CONFIG_CLEAR_INT_BIT(BIT(15)) /*ForWF200theIRQEnableandReadyBitsareinCONFIGregister*/ #defineSL_WFX_CONFIG_DATA_IRQ_ENABLE(BIT(16)) #defineSL_WFX_CONFIG_WUP_IRQ_ENABLE(BIT(17)) #defineSL_WFX_CONFIG_DATA_WUP_ENABLE(BIT(16)|BIT(17)) /*Revisionandtype*/ #defineSL_WFX_CONFIG_REVISION_OFFSET(0x18) #defineSL_WFX_CONFIG_REVISION_MASK(0x7) #defineSL_WFX_CONFIG_TYPE_OFFSET(0x1F) #defineSL_WFX_CONFIG_TYPE_MASK(0x1) /*SDIOCCCRregisteroffsets*/ #defineSL_WFX_SDIO_CCCR_IO_QUEUE_ENABLE(0x02) #defineSL_WFX_SDIO_CCCR_IRQ_ENABLE(0x04) #defineSL_WFX_SDIO_CCCR_BUS_INTERFACE_CONTROL(0x07) #defineSL_WFX_SDIO_CCCR_HIGH_SPEED_ENABLE(0x13) /*SDIOFBR1registeroffsets*/ #defineSL_WFX_SDIO_FBR1_BLOCK_SIZE_LSB(0x110)/*Function116-bitblocksizeLSB*/ #defineSL_WFX_SDIO_FBR1_BLOCK_SIZE_MSB(0x111)/*Function116-bitblocksizeMSB*/ #defineFW_VERSION_VALUE0x00000001 #endif//SL_WFX_REGISTERS_H