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Technology

>> XMOS Architecture

The XMOS architecture enables systems to be constructed from multiple XCore processors connected by communication links. Every XMOS device includes one or more XCores and a high-speed low-latency switch. The switches are used to route messages between XCores on a chip, and messages between chips, via the links.

>> XCore™ Processor

The XCore is a multithreaded processing component with instruction set support for communication, I/O and timing. Thread execution is deterministic and the time taken to execute a sequence of instructions can be accurately predicted. This makes it possible for software executing on an XCore to perform many functions normally performed by hardware, especially DSP and I/O.

>> XC Language

The XC concurrent programming language extends the sequential programming capabilities of the C language, providing explicit control of concurrency, communication, timing and input-output. It supports deterministic concurrent programming; compile-time checks eliminate race-conditions.

>> Development Tools & Software IP

The XMOS development tools are built on industry-standard platforms making use of open-source compiler technology. They enable the XC language to be combined with C and C++. Using XC, accurate timing of critical paths through programs guarantee that deadlines are met, enabling programs to behave as predictably as hardware.

A library of reference designs for popular applications and software modules makes it easy to start designing.

XCore resource diagram
  • Industry changing architecture provides a simple, rapid and cost-effective approach to creating electronic products.
  • Multi-threading, multiprocessing and event-handling is built into the hardware eliminating the need for kernels.
  • Deterministic execution with precise timing of I/O interactions allows software to perform functions normally done by hardware.
  • Scalable, event-driven architecture enables systems to grow seamlessly whilst minimising energy.
  • Development tools exploit the architecture and enable designers to see exactly how an XMOS system will behave.