The XMOS architecture combines a number of processing cores (called XCores) each with its own memory and I/O system, on a single chip. The processing cores are general-purpose in the sense that they can execute languages such as C; they also have direct support for concurrent processing (multi-threading), communication and I/O.

A high-performance switch supports communication between the processors, and inter-chip Links are provided so that systems can easily be constructed from multiple chips. Any thread can communicate with any other thread in the system using single-cycle communication instructions. The system switches can efficiently route short packets or streamed data.

The XMOS architecture makes it practical to use software to perform many functions that traditionally have been implemented in hardware, for example interfaces and I/O controllers. Both input and output operations can be timed to a local clock or an externally provided clock. The architecture is both multi-threaded and event-driven. Threads can be used to define independent tasks; the event mechanism enables fast and controlled responses to a multitude of signals.

The architecture is designed to support any programming language, such as C and C++. The full benefits of the instruction set may require extensions to standard languages, libraries, or the use of assembly language. We have designed XC, a version of C that supports I/O, multi-core and precision timing.