XC-3 Schematics

5
U2B
4
3
2
1U2C
PSTP1
XCORE 2
XCORE
VDD-3V3
RXCLK_0
CONFIG/TEST
CONFIG/TES
D10
RXER_0
X2D0
E10
D4
X2D1
F10
RESET_
SS_PLL_BYPASS
D5
X2D2
G10



FB1


VDD-3V3
SS_RESET
D7
X2D3
H10
VDD-CORE
SS_OTP_VPP
60
R61
10k
D8
X2D4
SS_XC0_BS0
J10
R36
4.7K
D9
X2D5
K9
Q7
DBG
SS_XC0_BS1
X2D6
PSTP2
E9
K8
TRSTB
2N7002
VDD-3V3
SS_DEBUG
G9
X2D7
K7
TCK
SS_TEST_ENA
H9
X2D8
K6
VDD-3V3
R62
10k
TRST
SS_TCK
J9
X2D9
SS_TRST
D
TXCLK_0
K5
C24
R11
TDI
J8
RXDV_0
X2D10
K4
100n
4.7K U3
4 20MHz
TDO
SS_TDI
R33
33R
J6
TXEN_0
X2D11
PSTP3
C11
TMS
SS_TDO
D
J5
X2D12
SS_TMS
D11
R15
330R
J4
RXD0_0
X2D13
E11
VDD-5V
VCC
1
R12
33R
SS_CLK
VDD-CORE
SS_CLK
SS_PLL_LOCK
E4
VDD-3V3
RXD1_0
X2D14
EN
OUT 3
SS_CLK
H11
TXD0_0
RA6D
5
4 33
X2D15
J11
R37
4R7
H4
TXD1_0
RA6C
6
3 33
X2D16
PSTP4
GND
SS_PLL_AVDD
K11
LED1
F4
R21
TXD2_0
RA6B
7
2 33
X2D17
SS_PLL_AGND
L10 X2D18
2
1.5k
TXD3_0
RA6A
8
1 33
L9
XS1-G
- 4 144 BGA
RXD2_0
X2D19
L8
C64 1u
RXD3_0
X2D20
L5
MDIO_0
X2D21
L4
nRST
X2D22
L3
MDC_0
X2D23
P10
P11
B12
RXCLK_1
X2D24
C12
RXD0_1
X2D25
D12
VDD-3V3
VDD-3V3
RXD1_1
X2D26
E12
VDD-3V3
VDD-3V3
VDD-3V3
VDD-3V3
TXD0_1
X2D27
RA7D
5
4 33
F12
S1
S2
S2
S1
TXD1_1
X2D28
RA7C
6
3 33
G12
TXD2_1
RA7B
7
2 33
X2D29
H12
A2
A1
FB5
FB7
A1
A2
VDD-3V3
TXD3_1
RA7A
8
1 33
X2D30
J12
LEDGND2
C2
C1
LEDGND1
60
60 LEDGND3
C1
C2
LEDGND4
VDD-3V3
RXP0 C60
22p
RXN0
RXD2_1
X2D31
K12
RXD3_1
X2D32
L12
TXP0 C61
22p
TXN0
RXDV_1
X2D33
M11
VDD-3V3
RJ45 2S
RJ45 2S
R26
RXER_1
X2D34
1 2 3 4 5 6 7 8
8 7 6 5 4 3 2 1
C26
M10
TRST
RXP1 C62
22p
RXN1
1.5k
TXCLK_1
X2D35
M9
VDD-3V3
100n
TXEN_1
X2D36
M8
TXP1 C63
22p
TXN1
MDC_1
X2D37
M7 X2D38
FB4
C
MDIO_1
M6 X2D39
60
M5
FB6
Q3
X2D40
M4
60
PGOODn
2N7002
C
X2D41
M3 X2D42
M2
R30
RXN0
R47
49R9
R51
49R9
RXN1
X2D43
10R
RXP0
R48
49R9
R52
49R9
RXP1
C73
XS1-G
- 4 144 BGA
C74
100n
R31
100n
10R
VDD-3V3
TXN0
R49
49R9
R53
49R9
TXN1
VDD-3V3
FB2
60
TXP0
R50
49R9
R54
49R9
TXP1
X0D[4..6]
VDD-3V3
C37
22n
C71
C72
C66
C38
C27
C28
100n
100n
100n
22n VDD-3V3
100n
100n
P12
1
2
TRST R55
1k
TRSTB
3
4
TDI
5
6
R807
33 X0D4
R56
TMS
7
8
10k
TCK
9
10 R808
33 X0D5
VDD-3V3
DBG
C29
11
12
C30
VDD-3V3
FB3
60
TDO
13
14
X0D6
25
7
30 33 35
8
100n
U5
LAN8700
4.7u
SRST
15
16
VDD-3V3
VDD-3V3
X0D39 17
18
X0D7
IO
33
A1 A2 A3
X0D4
C67
C68
19
20
33 33 33
C69
VDD
VDD
C33
C34
100n
100n
_CORE
100n
VDD VDD VDD
100n
100n
RXD0_0
RA1D
5
4 33 18
VDD
TXP0
R13
R16
RXD1_0
RA1C
6
3 33 17 RXD0/MODE0
TXP 29
TXN0
4.7k
10k
B RXD2_0 RA1B 7
2 33 16 RXD1/MODE1
TXN 28
RXD3_0
RA1A
8
1 33 15 RXD2/MODE2
RXP0
RESET_
B
RXD3/nINTSEL
RXP 32
RXN0
RXER_0
RXN 31
C35
C36
RA2C
6
3 33 21
C25
RXDV_0
RX_ER/RXD4
25
7
30 33 35
8
100n
4.7u
RA2A
8
1 33 19
U6
LAN8700
100n
RXCLK_0
RX_DV
RA2B
7
2 33 20
Q4
Q2
RX_CLK/REGOFF
IO
33
A1 A2 A3
2N7002
PGOODn
2N7002 3 4
TXD0_0
23
33 33 33
SW1
TXD1_0
TXD0
24
SPEED100/PHYAD0 9
R46
330R LEDGND1
VDD
VDD
_CORE
TXD2_0
TXD1
26
LINK/PHYAD1 10
R45
330R LEDGND2
VDD VDD VDD
TXD3_0
TXD2
27
ACTIVITY/PHYAD2 11
RXD0_1
RA3D
5
4 33 18
VDD
TXP1
TXD3
FDUPLEX/PHYAD3 12
Q6
RXD1_1
1 2
RA3C
6
3 33 17 RXD0/MODE0
TXP 29
TXN1
SRST
2N7002
36
RXD2_1
RA3B
7
2 33
TXN 28
COL/MII/CRS_DV
16 RXD1/MODE1
3
RXD3_1
RA3A
8
1 33 15 RXD2/MODE2
RXP1
CRS/PHYAD4
1
nRST
RXD3/nINTSEL
RXP 32
RXN1
TXEN_0
R24
33
6 nINT/TX_ER/TX4
nRST 5
RXER_1
RA4C
6
3 33 21
RXN 31
TXCLK_0
RA2D
5
4 33 22 TX_EN
XTAL_2
RXDV_1
RA4A
8
1 33
RX_ER/RXD4
TX_CLK
XTAL2 13
19
XTAL_1
RXCLK_1
RA4B
7
2 33
RX_DV
20
MDIO_0
CLKIN/XTAL1 14
4
RX_CLK/REGOFF
MDC_0
MDIO
2
R38
TXD0_1
MDC
EXRES1 34
23
33
TXD1_1
TXD0
24
SPEED100/PHYAD0 9
R44
330R LEDGND3
TXD2_1
TXD1
26
LINK/PHYAD1 10
R43
330R LEDGND4
TXD3_1
TXD2
27
ACTIVITY/PHYAD2 11
LED
/FLAG
POWER
R22
TXD3
FDUPLEX/PHYAD3 12
12.4k
PGOODn
VSS
36 COL/MII/CRS_DV
PGOODn
3
XTAL_2
CRS/PHYAD4
1
nRST
X0D[4..6]
XTAL_1
37
TXEN_1
nINT/TX_ER/TX4
nRST 5
R29
33
X0D39
X0D[4..6]
6
TXCLK_1
RA4D
5
4 33
X0D4
X0D39
22 TX_EN
A
X1
TX_CLK
XTAL2 13
XTAL_3
X0D7
X0D4
MDIO_1
CLKIN/XTAL1 14
X0D7
4
A
MDC_1
MDIO
2 MDC
EXRES1 34
25MHz
LED
POWER
XTAL_3
/FLAG
R27
12.4k
Schematic: ROOT
C31
R25
C32
VSS
33p
1M
33p
Title: XC-LED
37
Rev: 1.1
Date: Tuesday, November 24, 2009
C COPYRIGHT 2008
Sheet 1
of 3
Document No.: <Doc>
http://www.varisys.co.uk
5
4
3
2
1

---

5
4
3
2
1
U2A
VDD-3V3
U4
XCORE 0
XCORE
SPI_MOSI
5
SPI_MISO
J3
SPI_CLK
SI
6
VCC 8
SPI_S_
X0D0
H3
SCK
LED_A0_OUT
X0D1
G3
VDD-3V3
SPI_MISO
LED_A1_OUT
X0D2
F3
SO 2
X0D3
3 WP_N
X0D4
E3
7
X0D5
X0D4
D3
SPI_S_
1 HOLD_N
D
X0D6
X0D5
C4
CS_N
GND 4
X0D6
X0D7
C5
AT25DF041A
LED_A2_OUT
X0D7
C6 X0D8
C7
R17
SPI_CLK
X0D9
C8
DNF
VDD-3V3
SPI_MOSI
X0D10
C9
LED_CLK
X0D11
K2
VDD-5V
3V3_LED_DR0_OUT
X0D12
J2
LED_DR0_1
X0D13
H2
C59
LED_DG0_1
X0D14
E2
100n
LED_DB0_1
X0D15
D2
U14 20
LED_DR1_1
X0D16
C2
3V3_LED_DR0_OUT
2
LED_DR0_OUT
LED_DG1_1
X0D17
place close to U4
C
B3
3V3_LED_DG0_OUT
A0
3
Y0 18
LED_DG0_OUT
LED_DB1_1
X0D18
B4
SPI_CLK
C83 100p
3V3_LED_DB0_OUT
A1
4
VC Y1 17
LED_DB0_OUT
X0D19
B5
3V3_LED_DR1_OUT
A2
5
Y2 16
LED_DR1_OUT
X0D20
B8
SPI_MOSI
C84 100p
3V3_LED_DG1_OUT
A3
6
Y3 15
LED_DG1_OUT
3V3_LED_DG0_OUT
X0D21
B9
3V3_LED_DB1_OUT
A4
7
Y4 14
LED_DB1_OUT
3V3_LED_DB0_OUT
X0D22
B10
3V3_LED_CLK_OUT
A5
8
Y5 13
LED_CLK_OUT
3V3_LED_DR1_OUT
X0D23
L1
3V3_LED_LTCH_OUT
A6
9
Y6 12
LED_LTCH_OUT
3V3_LED_DG1_OUT
X0D24
K1
3V3_LED_CLK_OUT
A7
Y7 11
C96 100p
DATA_0
X0D25
C
J1
1
DATA_1
X0D26
H1
3V3_LED_LTCH_OUT
C94 100p
OE1
19
DATA_2
X0D27
G1
OE2 GND
DATA_3
X0D28
F1
LED_OE_OUT
C95 100p
74AC541
DATA_4
X0D29
E1
10
DATA_5
X0D30
D1
LED_CLK
C92 100p
DATA_6
X0D31
C1
DATA_7
X0D32
B1
3V3_LED_DB1_OUT
X0D33
A2
3V3_LED_CLK_OUT
X0D34
A3
P13
3V3_LED_LTCH_OUT
X0D35
A4
LED_DR0_1
1
2
LED_DG0_1
LED_OE_OUT
X0D36
A5
LED_DB0_1
3
4
DATA_CLK
X0D37
A6
LED_DR1_1
5
6
LED_DG1_1
X0D38
A7
LED_DB1_1
X0D39
X0D39
7
8
A8 X0D40
9
10
A9 X0D41
11
12
A10
LED_CLK
X0D42
13
14
A11 X0D43
15
16
XS1-G4 144 BGA
X
B
X0D[4..6]
P14
LED_DR0_OUT 1
2
LED_DG0_OUT
LED_DB0_OUT 3
4
LED_DR1_OUT 5
6
LED_DG1_OUT
LED_DB1_OUT 7
8
LED_A0_OUT
9
10
LED_A1_OUT
LED_A2_OUT 11
12
LED_CLK_OUT 13
14
LED_LTCH_OUT
LED_OE_OUT 15
16
VDD-5V
VDD-3V3
VDD-3V3
VDD-3V3
VDD-3V3
P15
3V3_LED_LTCH_OUT
DATA_CLK
1
2
DATA_0
3
4
DATA_1
DATA_2
5
6
DATA_3
R57
R58
R59
R60
7
8
10k
10k
10k
10k
DATA_4
9
10
DATA_5
A
DATA_6
11
12
DATA_7
13
14
LED_CLK
3V3_LED_CLK_OUT
LED_OE_OUT
15
16
Schemati
Sch
c: LED
Title: XC-LED
X
P15 becomes 2.54mm non-populated
standard IDC bank
Rev: 1.1
Date: Tuesday, November 24, 2009
C COPYRIGHT 2008
C COPY
Sheet
Sh
2
of 3
Documen
Docu
t No.:
men
<Doc>
http
tt ://www
://
.
www varisy
ri s.
sy co
s. .uk

---

5
4
3
2
1
VDD-3V3
U2D
VDD-5V
POWER
POWE
A1 IO VDD
B6
IO VSS M1
IO VDD
B11
IO VSS L11
IO VDD
U1
LTC3417
F2
IO VSS L6
C18
C19
IO VDD
G11
IO VSS G2
D
10u
10u
IO VDD
3
L2
IO VSS F11
VIN1
VIN2 9
IO VDD
IO VSS B7
D
L7 IO VDD
M12
IO VSS B2
VDD-CORE
IO VDD
IO VSS A12
VDD-CORE
L1
L2
VDD-3V3
C3 VDD
1u
2.2u
C10
VSS H8
VDD
18
D6
VSS H7
SW1
SW2 13
VDD
TP5
P 7
TP5
P 8
F9
VSS H6
C16
C21
VDD
G4
VSS H5
22p
22p
VDD
J7
VSS G8
VDD
VSS G7
R9
K3 VDD
VSS G6
10k
K10 VDD
VSS G5
R1
R6
VSS F8
120k
TP59
TP6
P 0
470k
TP59
VSS F7
5 VFB1
VFB2 6
VSS F6
TP6
P 1
TP6
P 2
TP6
P 3
VSS F5
4 ITH1
ITH2 7
VSS E8
C13
C14
C15
R2
R5
C70
C22 R10
C23
VSS E7
22u
22u
22u
470k
2 RUN1
RUN2 8
150k
22u
22u
10k
100n
VSS E6
C
R3
R4
VSS E5
5.9k
12
PGOOD 14
2.87k
C
15 MODE
XS1-G4 144 BGA
X
FREQ
D
17
VDD-3V3
PHASE
TP6
P 6
/GND
TP6
P 7
1 A
2
D D
2
C17
C20
2.2n
PGND GND GND GND PGND2 PGND PGND
6.8n
R42
R8
19 16 1 20 21 10 11
10k
10k
PGOODn
TP6
P 9
Q1
2N7002
B
VDD-5V
VDD-5V
MTH1
H
J1
F1
1.1A
PV5
PV
B
1.1 VDD_IN
PV6
PV
MTH2
H
PV1
PV
PV7
PV
1
MTH3
H
VDD-3V3
VDD-CORE
3
PV2
PV
PV8
PV
MTH4
H
C91
PV3
PV
2
PV1
PV 7
C5
100n
C1
1u
TVS1
47u
PV4
PV
PV1
PV 8
SMAJ5A
PV5
PV 3
PV1
PV 9
C6
100n
C2
1u
PV5
PV 4
PV2
PV 0
PV5
PV 5
PV2
PV 1
C7
100n
C3
1u
CONN JACK
PV5
PV 6
PV2
PV 2
PV2
PV 3
C8
100n
C4
1u
POWER VIAS
VDD-3V3
PV2
PV 4
PV4
PV 9
PV2
PV 5
PV5
PV 0
C9
100n
C79
1u
PV9
PV
PV2
PV 6
PV5
PV 1
PV1
PV 0
PV2
PV 7
PV5
PV 2
C10
100n
C80
1u
PV1
PV 1
PV2
PV 8
PV3
PV 7
PV1
PV 2
PV2
PV 9
PV3
PV 8
C11
100n
C81
1u
PV3
PV 0
PV3
PV 9
VDD-CORE
PV3
PV 1
PV4
PV 0
C12
100n
C82
1u
PV7
PV 3
PV3
PV 2
PV6
PV 5
A
PV7
PV 4
VDD_IN
PV4
PV 1
PV6
PV 6
PV7
PV 6
PV5
PV 7
PV1
PV 3
PV4
PV 2
PV6
PV 7
A
PV7
PV 5
PV5
PV 8
PV1
PV 4
PV4
PV 3
PV6
PV 8
PV7
PV 7
PV5
PV 9
PV1
PV 5
PV4
PV 4
PV6
PV 9
Schemati
Sch
c: POWER
PV7
PV 8
PV6
PV 0
PV1
PV 6
PV4
PV 5
PV7
PV 0
PV7
PV 9
PV6
PV 1
PV3
PV 3
PV4
PV 6
PV7
PV 1
Title: XC-LED
X
PV8
PV 0
PV6
PV 2
PV3
PV 4
PV4
PV 7
PV7
PV 2
PV6
PV 3
PV3
PV 5
PV4
PV 8
Rev: 1.1
Date: Tuesday, November 24, 2009
C COPYRIGHT 2008
C COPY
PV6
PV 4
PV3
PV 6
Sheet