Estimating Power Consumption For XS1-G Devices
Version 1.0
Publication Date: 2010/06/07
Copyright © 2010 XMOS Ltd. All Rights Reserved.

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Estimating Power Consumption For XS1-G Devices (1.0)
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1
Introduction
This application note discusses the methodology for estimating total average power
consumption of XS1-G devices. Power estimates are based on characterization data
measured over power supply voltage, core frequency (CLK), and junction temperature
(TJ).
The total power consumption of the XS1-G processor is the sum of the power
consumed for both of the power supply domains, VDD(CORE) and VDD(IO). The
power consumed from the VDD(IO) power supply domain depends on the Ioad and
toggle frequency of the XCore output pins.
The intent of this document is to assist board designers in estimating their power
budget for power supply design and thermal relief designs using XS1-G processors.
It provides a breakdown of the elements of the VDD(CORE) and a simple worked
example.
Please consult the following sections of XS1-G device specific datasheets for specific
details discussed in this application note:
· Operating Conditions for details regarding VDD(CORE) and VDD(IO) ranges.
· Ordering Guide for a comprehensive list of the available speed and temperature
grade models.
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Estimating Power Consumption For XS1-G Devices (1.0)
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2
Internal Power Consumption
The total power consumption due to internal circuitry (on the VDD(CORE) supply)
is the sum of the static power component and dynamic power component of each
processor, the switch's core logic, and the PLL and circuitry clocked from the PLL
directly.
The dynamic portion of the XCore internal power depends in varying degrees on the
operating frequency, the resources being used, the instruction execution sequence,
the data operands involved, and the instruction rate. The dynamic portion of
the switch power depends on the operating frequency, amount of communication
activity and the data itself. The static portion of the internal power is a function
of temperature, voltage and the process characteristics of the silicon. It is not
directly related to processor or switch activity, however any activity which raises the
temperature has a secondary effect on the static power.
XMOS provides current consumption figures for the system components and utiliza-
tion scenarios shown in Table 1. System application code can be mapped to these
discrete numbers to estimate the dynamic portion of the internal power consumption
for XS1-G processors in a given application.
3
Calculating Application Specific Internal Power
Consumption
The power vectors from Table 1 are all measured and expressed in this section
for a nominal VDD of 1V. The total current consumption of the XS1 device can be
calculated by simply summing the vectors which are appropriate for the application.
The static power consumption changes depending on the process characteristics
of the silicon in the XS1-G device. Fast silicon consumes more static current than
slow or typical silicon at the same temperature. In the static power section below the
static profile for both typical and fast silicon is shown.
The process characteristics of the silicon do not have the same effect on dynamic
power consumption as they have on static power, so the process characteristics are
not considered in the dynamic power sections.
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Estimating Power Consumption For XS1-G Devices (1.0)
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Component
Description
Current Calculations
IDD-STATIC
Static current, independent of Always include this static fig-
clock frequency.
ure. Look up value in Fig-
ure 1 using temperature and
process. (typical / fast).
IDD-DYN-BASE
The base dynamic power con- Always include this base
sumption of four XCores run- value using Figure 2 using
ning a typical instruction se- the XCore clock frequency.
quence, with minimal resource
use.
IDD-DYN-BUSY
The incremental dynamic power Add this value over and
consumption to IDD-DYN-BASE above IDD-DYN-BASE if the
when the instruction pipeline application code always has
is fully active with an aggres- at least four active threads
sive instruction sequence (for that are not paused. Use the
example, four threads running XCore clock to look up the
with minimum stalls to wait for value in Figure 3.
event completion).
IDD-DYN-RSRC
The incremental dynamic power Add this value over and
consumption to IDD-DYN-BASE above IDD-DYN-BASE and
when a full complement of port possibly IDD-DYN-BUSY if
resources (sufficient to utilize the application code has all
all the general purpose I/O) are of the ports on all of the
enabled. Few applications will four XCores enabled. Use
actually use this amount of re- the XCore clock to look up
sources so this component can the value in Figure 4.
be regarded as an upper bound
for resource usage.
IDD-DYN-SWITCH
The dynamic power consump- Always include this value
tion for the inter-core commu- from Figure 5 using the
nication switch.
Switch clock frequency.
Table 1: Internal Power Vectors
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Estimating Power Consumption For XS1-G Devices (1.0)
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3.1
Static Power Consumption
While not strictly true, the static component of the power consumption can be
considered to be invariant of operating frequency or circuit usage as a first order
approximation. There is an exponential relationship between a device's tempera-
ture and its static power. The static power of a device is also dependent on the
silicon's process characteristics. Figure 1 provides IDD-STATIC values at different
temperatures for typical and fast silicon.
IDD-STATIC values should always be included in a power consumption calculation.
Note that the values in Figure 1 are applicable to all XS1-G devices--use the same
values for all XS1-G4 and XS1-G2 components.
3000
Fast
2500
2000
1500
Typical
1000
IDD-STATIC @ 1V (mA)
500
-60
-40
-20
0
20
40
60
80
100
120
140
Temperature (°C)
Figure 1: XS1-Gn IDD-DYN-STATIC vs Temperature for typical and fast silicon
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Estimating Power Consumption For XS1-G Devices (1.0)
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3.2
Dynamic Base Power Consumption
The base dynamic power consumption is shown in Figure 2 for all four XS1-G4 XCores
running a typical instruction sequence, with minimal resource use.
For XS1-G2 devices, the value taken from Figure 2 should be divided by 2 before
being used to indicate that only two XCores are being used.
For XS1-G devices where various xcores are clocked at different frequencies, make a
reading for the frequency that each XCore is running at. Then add those figures and
divide by 4.
The IDD-DYN-BASE value should always be included in a power consumption calcula-
tion.
1000
800
600
400
IDD @ 1V (mA)
200
0
0
100
200
300
400
XCore Frequency (MHz)
Figure 2: IDD-DYN-BASE vs Frequency
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Estimating Power Consumption For XS1-G Devices (1.0)
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3.3
Busy Pipeline Power Consumption
Applications using four or more threads each performing a significant amount of
processing will cause the XCore pipeline to be busy. So long as these threads do
not spend much time waiting for events like low frequency port data input or timer
timeouts, the IDD-DYN-BUSY component should be added to the current calculations.
The busy dynamic power consumption is shown in Figure 3 for all four XS1-G4 XCores
running computationally intensive code on at least four threads per XCore, with
minimal resource use.
For XS1-G2 devices with two busy XCores, the value taken from Figure 3 should be
divided by 2 before being used to indicate that only two XCores are being used.
IDD-DYN-BUSY values are only included in a power consumption calculation when all
four XCores have at least four active threads that do not pause regularly.
400
350
300
250

@ 1V (mA)
200
150
100
50
Incremental IDD
0
0
100
200
300
400
XCore Frequency (MHz)
Figure 3: IDD-DYN-BUSY vs Frequency
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Estimating Power Consumption For XS1-G Devices (1.0)
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3.4
Estimating Resource Related Power Consumption
The IDD-DYN-BASE component assumes minimal resource usage. The IDD-DYN-
RSRC component provides the additional current when the full compliment of port
resources on all four XCores of an XS1-G4 are enabled.
Because applications can vary in their exact resource usage so widely, designers must
place their application resource usage between the two extremes of IDD-DYN-BASE
and IDD-DYN-RSRC to estimate what fraction of IDD-DYN-RSRC to add to the power
calculation.
Designers should bear in mind that applications making heavy use of port I/O or
timers may well experience lower pipeline activity if many threads are paused waiting
for events from ports or timers.
For XS1-G2 devices with both XCores using the full compliment of ports, the value
taken from Figure 4 should be divided by 2 before being used to indicate that only
two XCores are being used.
300
250
200
150
100
Incremental IDD @ 1V (mA)
50
0
0
100
200
300
400
XCore Frequency (MHz)
Figure 4: XS1-G4 IDD-DYN-RSRC vs Frequency
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Estimating Power Consumption For XS1-G Devices (1.0)
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3.5
System Switch Power Consumption
The system switch is used to communicate between the XCores on an XS1-Gn device,
and between chips in an XS1-Gn network. The IDD-DYN-SWITCH power component
should always be incorporated according to the frequency at which the system switch
is clocked at. (This may differ from the XCore clock frequencies.)
The system switch clock is derived as an integer division (which may be 1) from
the internal PLL. The maximum divider is 256, which with the PLL output set to
400MHz would give a 1.5MHz system switch speed. Slowing down the system switch
frequency will increase the latency of communications between XCores, but reduce
the power consumption.
IDD-DYN-SWITCH should always be included in a power consumption calculation.
Note that the values in Figure 5 are applicable to all XS1-G devices--the values used
for XS1-G2 devices should not be modified.
250
200
150
100
50
0
0
100
200
300
400
IDD Saving When Not Using Switch @ 1V (mA)
System Switch Frequency (MHz)
Figure 5: XS1-Gn IDD-DYN-SWITCH vs Frequency
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Estimating Power Consumption For XS1-G Devices (1.0)
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4
Estimating External Power Consumption
External power consumption (on the VDDIO supply) is dependent on the enabled
peripherals in a given system. Each unique group of peripheral pins contributes to a
piece of the overall external power, based upon several parameters:
· A--The number of output pins that switch during each cycle
· f--The maximum frequency at which the output pins can switch
· VDDIO--The voltage swing of the output pins
· CL--The load capacitance of the output pins, including the capacitance of the
pin itself2.
· U--The utilization factor (the percentage of time that the peripheral is on and
running)
Use the above parameters to calculate the average external power (PEXT) as follows:
PEXT = VDDIO2 x A x CL x f x U
4.1
VDDIO
Please refer to the relevant device datasheet for VDDIO ranges and maximums.
4.2
General Purpose I/O
For general purpose I/O the system designer must determine the parameters A, f
and U independently based on knowledge of the application.
2It is up to the user to determine the correct value of load capacitance CL. This may not be an easy
task since determining PCB trace capacitance is not straight forward. A network analyzer may be used
where a Smith Chart is used to determine impedance of the trace. Extracting the capacitive element
from the Smith Chart is the only component of the impedance that is needed for the equations.
Alternatively, since PCBs are not yet manufactured early in the design process, the PCB layout engineers
may be able to estimate capacitance of the trace based on line width, length, and board type. It is
relatively easy to determine input capacitance of other devices on the PCB trace since these numbers
are usually described in the respective datasheets. All of these capacitive elements must be summed
and then added into the equation as the coefficient, CL.
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Estimating Power Consumption For XS1-G Devices (1.0)
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4.3
XMOS Links
Where XMOS Links are used, the product of A x U x f can be replaced with the
following equations:
2-wire mode:
AUFXMOS Link = 10 x simplex_data_ratelink
5-wire mode:
AUFXMOS Link = 4 x simplex_data_ratelink
Where simplex_data_ratelink is the expected data rate of the link in megabytes/second.
Note that this data rate should be the expected data rate of this particular link in
this application context, which may be less than the maximum data rate the link is
capable of. Also note that this parameter refers to the data rate in a single direction
only. If bi-directional communication is taking place over a given XMOS Link, the
power should be calculated once for each direction, using the appropriate data rates
(which may not be symmetric).
5
Thermal Limitations
The maximum junction temperature for XS1-G devices is specified in the datasheets
at 125C. The maximum ambient temperature is also specified which may be 70C
for commercial devices or 85C for industrial devices. Depending on the power
generated by the XS1-G device and its ambient temperature, the junction temperature
may exceed 125C unless air is forced across the device, a heatsink is attached, or
perhaps both.
The thermal resistance of the XS1-G4 512BGA package is shown in Table 2. When
combined with the estimate for the power consumption of the device and the ambient
temperature an estimate can be made for the operational junction temperature. If
this exceeds 125C, then the XS1-G4 device will need either some forced airflow or a
heatsink.
Airflow (m/s) JA (C/W)
0
26.9
0.5
24.1
1
22.9
2
21.8
Table 2: JA for the XS1-G4 512BGA with no heatsink against airflow
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Estimating Power Consumption For XS1-G Devices (1.0)
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6
Conclusion
Several variables affect the power requirements of an embedded system. Measure-
ments published in the XS1-G processor datasheets are indicative of typical parts
running under typical conditions. However, these numbers do not reflect the actual
numbers that may occur for a given processor under non-typical conditions. In
addition to the type of silicon that the customer could have, the ambient tempera-
ture, core and system frequencies, supply voltages, pin capacitances, power modes,
application code, and peripheral utilization contribute to the average total power
that may be dissipated.
The average power estimates obtained from methods described in this document
indicate how much the XS1-G processor loads a power source over time. These
estimates are useful in terms of expected power dissipation within a system, but
designs must support worst-case conditions under which the application can be
run. Do not use this calculation to size the power supply, as the power supply must
support peak requirements.
7
Example
The typical power is estimated for an example application with the following charac-
teristics:
· XS1-G4 512BGA device
· Typical instruction loading with threads pausing occasionally
· Half of each XCore ports are enabled
· 400MHz operation
· 25C ambient temperature
· No heatsink
· No airflow
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Estimating Power Consumption For XS1-G Devices (1.0)
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Component
Description
Current
IDD-DYN-BASE
This is always included. Using the value for 900mA
400MHz.
IDD-DYN-BUSY
The application does not fill the pipeline con-
tinuously. The pipeline operation is similar
to the BASE level. So no value is used for this.
0.5 x IDD-DYN-RSRC
About half of the port resources are used so 142mA
we will add in half of the value indicated by
figure 4 for 400MHz.
IDD-DYNSWITCH
The switch is operating at 400MHz.
200mA
IDD-STATIC Estimate
The static power increases the junction tem- 570mA
perature, which then causes a change to the
static power. So at this stage an estimate is
made for static current. Let us estimate that
the junction temperature will be 50C above
ambient. Choose the typical static current at
75C from Figure 1.
Total current estimate 1
Sum the current so far.
1812mA
Estimate junction tempera- For this current at 1.0V and a JA of 73.7C
ture
26.9C/W. An improved estimate for the junc-
tion temperature is:
1.812W * 26.9C/W+25C=73.7C
IDD-STATIC check estimate The IDD-STATIC estimate was based on a Estimate valid
junction temperature of 75C. The temper-
ature based on this value for IDD-STATIC is
73.7C. This is close enough for the estimate
to be considered valid. If it were not, a new
value for IDD-STATIC based on the new tem-
perature should be made and the thermal
calculation repeated.
Total Power
1812mW
Table 3: Average Power for High Activity, Single Chip Scenario
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Document History
Date
Release
Comment
2010-06-07
1.0
First release
Disclaimer
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"Information") and is providing it to you "AS IS" with no warranty of any kind, express or
implied and shall have no liability in relation to its use. XMOS Ltd. makes no representation
that the Information, or any particular implementation thereof, is or will be free from any
claims of infringement and again, shall have no liability in relation to any such claims.
Copyright © 2010 XMOS Ltd. All Rights Reserved. XMOS and the XMOS logo are registered
trademarks of XMOS Ltd in the United Kingdom and other countries, and may not be used
without written permission. Company and product names mentioned in this document are the
trademarks or registered trademarks of their respective owners. Where those designations
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been printed with initial capital letters or in all capitals.
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Document Outline

• Introduction
• Internal Power Consumption
• Calculating Application Specific Internal Power Consumption
• Estimating External Powe