John Edwards's Blog

The xCORE 64-bit accumulator and memory bus

Posted: 03 November 2015

In a previous blog I discussed the new DSP capabilities of the xCORE-200 architecture at a very high level. I'd now like to look at some of those DSP capabilities in more detail.

XMOS xCORE-200 devices are built around a 32-bit fixed point architecture, which includes a 64-bit accumulator for enhanced dynamic range. This architecture was chosen because it gives flexibility to implement many different forms of fixed-point and integer arithmetic efficiently.

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It’s not just about the MIPS!

Posted: 27 October 2015

Designing electronic products today is a highly complicated challenge that goes well beyond the old question of "How many MIPS does the microprocessor have?" Designers must solve the fundamental requirements of their products, while meeting strict international standards, and integrating innovative features to support IoT (Internet of Things) technologies. And consumer products also need to be fashionable as well.

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